%% inria-00494224, version 1
%% http://hal.inria.fr/inria-00494224/en/
@inproceedings{LETALLEC:2009:INRIA-00494224:1,
    hal_id = {inria-00494224},
    url = {http://hal.inria.fr/inria-00494224/en/},
    title = {{Toward a TLM to RTL refinement : a formal approach}},
    author = {Le Tallec, Jean-Fran{\c c}ois and Deantoni, Julien},
    abstract = {{Due to increasing complexity of SoC and shortening life time cycle of product, time to market becomes a ma- jor challenge in SoC design. To overcome this problem, an abstract representation of the platform under develop- ment can be used by software developers at the early stage of the development. This abstracted platform is then re- fined until its complete specification. For now, it remains difficult to implement and simulate a system that mixes TLM and RTL code. In this paper, we proposed a first step to bridge this gap by using CCSL as a mean to synchro- nize the system interfaces independently of their abstrac- tion level. We describe a potential way to logically specify transaction at different levels of abstraction.}},
    language = {Anglais},
    affiliation = {AOSTE - INRIA Rocquencourt / INRIA Sophia Antipolis / Laboratoire I3S - INRIA - Universit{\'e} de Nice Sophia-Antipolis - CNRS : UMR6070},
    booktitle = {{3rd Junior Researcher Workshop on Real-Time Computing (JRWRTC 2009)}},
    address = {Paris, France},
    audience = {internationale },
    year = {2009},
    month = Oct,
    pdf = {http://hal.inria.fr/inria-00494224/PDF/Toward\_a\_TLM\_to\_RTL\_re\_nement\_a\_formal\_approach.pdf},
}

%% inria-00601840, version 1
%% http://hal.inria.fr/inria-00601840/en/
@inproceedings{LETALLEC:2011:INRIA-00601840:1,
    hal_id = {inria-00601840},
    url = {http://hal.inria.fr/inria-00601840/en/},
    title = {{Combining SystemC, IP-XACT and UML/MARTE in model-based SoC design}},
    author = {Le Tallec, Jean-Fran{\c c}ois and Deantoni, Julien and De Simone, Robert and Ferrero, Beno{\^\i}t and Mallet, Fr{\'e}d{\'e}ric and Maillet-Contoz, Laurent},
    abstract = {{Modern SoC design may rely on models, or on highlevel description languages. Although very close, the benefits obtained from either sides can be substantially different (and mismatch may occur). The IP-Xact formalism, now a standard (IEEE 1685), was introduced to help assemble component IP from distinct sources into an integrated design. Components could be expressed in high-level HDLs such as SystemC, so should be the full design after translation. Experience shows that in fact this is hardly the case, specially in publicly available methods and tools. The present contribution goes one step into linking SystemC designs to their IP-Xact structural representation by translation. It then exports the resulting IP-Xact model into the UML/MARTE profile modeling framework, to allow to annotating existing models with additional information (again in a publicly available fashion, as opposed to vendor extensions). Even if our approach is still far from being complete, it bridges a number of gaps induce by the combined uses of SystemC and IP-Xact.}},
    language = {Anglais},
    affiliation = {AOSTE - INRIA Rocquencourt / INRIA Sophia Antipolis / Laboratoire I3S - INRIA - Universit{\'e} de Nice Sophia-Antipolis - CNRS : UMR6070 - STMicroelectronics (Crolles) - ST-CROLLES - STMicroelectronics},
    booktitle = {{Workshop on Model Based Engineering for Embedded Systems Design (M-BED 2011)}},
    address = {Grenoble, France},
    note = {This paper has been partially supported by the French ANR project HELP (ANR-09-SEGI-006) },
    audience = {internationale },
    year = {2011},
    month = Mar,
    pdf = {http://hal.inria.fr/inria-00601840/PDF/M-BED\_2011\_fullpaper.pdf},
}

%% inria-00601843, version 1
%% http://hal.inria.fr/inria-00601843/en/
@inproceedings{LETALLEC:2011:INRIA-00601843:1,
    hal_id = {inria-00601843},
    url = {http://hal.inria.fr/inria-00601843/en/},
    title = {{SCIPX: a SystemC to IP-XACT extraction tool}},
    author = {Le Tallec, Jean-Fran{\c c}ois and De Simone, Robert},
    abstract = {{The IP-Xact formalism (IEEE 1685 standard), was introduced to help assemble IP components from distinct sources into an integrated design. Components would be expressed in high-level HDLs such as SystemC, and so should be the full design after composition. Currently, while components exist at SystemC level, they generally do not provide any local IP-Xact structural interface representation. The present contribution studies the difficulties in creating such an IP-Xact interface declaration from SystemC, solves most of them, and provide SystemC modeling guidelines so that a richer set of informations can be recovered and reported into IP-Xact.}},
    keywords = {soon available on ieeexplore},
    language = {Anglais},
    affiliation = {AOSTE - INRIA Rocquencourt / INRIA Sophia Antipolis / Laboratoire I3S - INRIA - Universit{\'e} de Nice Sophia-Antipolis - CNRS : UMR6070},
    booktitle = {{ESLsyn : Electronic System Level Synthesis Conference}},
    address = {San Diego, {\'E}tats-Unis},
    audience = {internationale },
    year = {2011},
    month = Jun,
}

